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csrsic.h
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1
2// Licensed Materials - Property of IBM
3// ZOSLIB
4// (C) Copyright IBM Corp. 2020. All Rights Reserved.
5// US Government Users Restricted Rights - Use, duplication
6// or disclosure restricted by GSA ADP Schedule Contract with IBM Corp.
8
9#ifndef __CSRSI
10
11#define __CSRSI
12
13// TODO(gabylb): disable for Woz clang till it supports OS linkage:
14// extern "OS" { - error: unknown linkage language
15#if defined(__ibmxl__)
16
17/*********************************************************************
18 * *
19 * Name: CSRSIC *
20 * *
21 * Descriptive Name: Store System Information C declares *
22 * */
23 /*01* PROPRIETARY STATEMENT= */
24 /***PROPRIETARY_STATEMENT********************************************/
25 /* */
26 /* */
27 /* LICENSED MATERIALS - PROPERTY OF IBM */
28 /* 5694-A01 COPYRIGHT IBM CORP. 1999,2010 */
29 /* */
30 /* STATUS= HBB7770 */
31 /* */
32 /***END_OF_PROPRIETARY_STATEMENT*************************************/
33 /* */
34 /*01* EXTERNAL CLASSIFICATION: PI */
35 /*01* END OF EXTERNAL CLASSIFICATION: */
36 /* */
37/* Function: *
38 * CSRSIC defines types, related constants, and function *
39 * prototypes for the use of the CSRSI service *
40 * from the C language *
41 * *
42 * Usage: *
43 * #include <CSRSIC.H> *
44 * *
45 * Notes: *
46 * 1. This member should be copied from SAMPLIB to the *
47 * appropriate local C library. *
48 * *
49 * 2. CSRSI service does not use a null *
50 * character to terminate strings. The services expect the *
51 * character operands to be a fixed-length type. *
52 * Use memcpy to move into and from these fields. *
53 * *
54 * Change Activity: *
55 *$00=STSICSR,HBB6601, 990206, PDXB: OW38489 STSI *
56 *$H1=STSICSR,HBB6601, 990206, PDXB: OW38489 STSI *
57 *$L1=STSI ,HBB7707, 011201, PDXB: si22v1alt *
58 *$L2=GT16WAY,HBB7709, 021211, PDXB: si00PCCA_CPU_Address_Mask *
59 *$H2=STSICSR,HBB7709, 031105, PDXB: Model Capacity Identifier *
60 *$H3=IFA HBB7709 031205 PDXB: IFA support *
61 *$L3=ME05086 HBB7730 051115 PDXB: LPAR origin *
62 *$01=OA21459 HBB7720 070614, PD00KD: Cleanup sequence numbers *
63 *$L4=ME18454 HBB7770 100210, PD00XB: Improve access to CVT *
64 * *
65 *********************************************************************/
66/*********************************************************************
67 * Type Definitions for User Specified Parameters *
68 *********************************************************************/
69
70/* Type for Request operand of CSRSI */
71typedef int CSRSIRequest;
72
73/* Type for InfoAreaLen operand of CSRSI */
74typedef int CSRSIInfoAreaLen;
75
76/* Type for Return Code */
77typedef int CSRSIReturnCode;
78
79
80
81/*********************************************************************
82 * Function Prototypes for Service Routines *
83 *********************************************************************/
84
85#ifdef __cplusplus
86 extern "OS" {
87#else
88 #pragma linkage(CSRSI_calltype,OS)
89#endif
90typedef void CSRSI_calltype(
91 CSRSIRequest __REQUEST, /* Input - request type */
92 CSRSIInfoAreaLen __INFOAREALEN, /* Input - length of infoarea */
93 void *__INFOAREA, /* Input - info area */
94 CSRSIReturnCode *__RC); /* Output - return code */
95
96#define csrsi CSRSI
97extern CSRSI_calltype CSRSI;
98
99
100#ifdef __cplusplus
101 }
102#endif
103
104#ifndef __cplusplus
105#define csrsi_byaddr(Request, Flen, Fptr, Rcptr) \
106{ \
107 ((struct CSRSI_PSA*) 0) -> \
108 CSRSI_cvt->CSRSI_cvtcsrt->CSRSI_addr \
109 (Request,Flen,Fptr,Rcptr); \
110}
111#endif
112
113struct CSRSI_CSRT {
114 unsigned char CSRSI_csrt_filler1 [48];
115 CSRSI_calltype* CSRSI_addr;
116};
117
118struct CSRSI_CVT {
119 unsigned char CSRSI_cvt_filler1 [116];
120 struct {
121 unsigned int CSRSI_cvtdcb_rsvd1 : 4; /* Not needed */
122 unsigned int CSRSI_cvtosext : 1; /* If on, indicates that the
123 CVTOSLVL fields are valid */
124 unsigned int CSRSI_cvtdcb_rsvd2 : 3; /* Not needed */
125 } CSRSI_cvtdcb;
126 unsigned char CSRSI_cvt_filler2 [427];
127 struct CSRSI_CSRT * CSRSI_cvtcsrt;
128 unsigned char CSRSI_cvt_filler3 [716];
129 unsigned char CSRSI_cvtoslv0;
130 unsigned char CSRSI_cvtoslv1;
131 unsigned char CSRSI_cvtoslv2;
132 unsigned char CSRSI_cvtoslv3;
133 struct {
134 unsigned int CSRSI_cvtcsrsi : 1; /* If on, indicates that the
135 CSRSI service is available */
136 unsigned int CSRSI_cvtoslv1_rsvd1 : 7; /* Not needed */
137 } CSRSI_cvtoslv4;
138 unsigned char CSRSI_cvt_filler4 [11]; /* */
139};
140
141
142struct CSRSI_PSA {
143 char CSRSI_psa_filler[16];
144 struct CSRSI_CVT* CSRSI_cvt;
145};
146
147/* End of CSRSI Header */
148
149#endif // if defined(__ibmxl__)
150
151/*********************************************************************/
152/* si11v1 represents the output for a V1 CPC when general CPC */
153/* information is requested */
154/*********************************************************************/
155
156typedef struct {
157 unsigned char _filler1[32]; /* Reserved @H1A*/
158 unsigned char si11v1cpcmanufacturer[16]; /*
159 The 16-character (0-9
160 or uppercase A-Z) EBCDIC name
161 of the manufacturer of the V1
162 CPC. The name is
163 left-justified with trailing
164 blank characters if necessary.
165 @H1A*/
166 unsigned char si11v1cpctype[4]; /* The 4-character (0-9) EBCDIC
167 type identifier of the V1 CPC.
168 @H1A*/
169 unsigned char _filler2[12]; /* Reserved @H1A*/
170 unsigned char si11v1cpcmodelcapident[16]; /*
171 The 16-character (0-9 or
172 uppercase A-Z) EBCDIC model
173 capacity identifier of the
174 configuration. The identifier
175 is left-justified with trailing
176 blank characters if necessary.
177 If the first word of
178 si11v1cpcmodel1 is zero, this
179 field also represents the
180 model @H2C*/
181 unsigned char si11v1cpcsequencecode[16]; /*
182 The 16-character (0-9
183 or uppercase A-Z) EBCDIC
184 sequence code of the V1 CPC.
185 The sequence code is
186 right-justified with leading
187 EBCDIC zeroes if necessary.
188 @H1A*/
189 unsigned char si11v1cpcplantofmanufacture[4]; /* The 4-character
190 (0-9 or uppercase A-Z) EBCDIC
191 plant code that identifies the
192 plant of manufacture for the
193 V1 CPC. The plant code is
194 left-justified with trailing
195 blank characters if necessary.
196 @H1A*/
197 unsigned char si11v1cpcmodel1[16]; /* The 16-character (0-9 or
198 uppercase A-Z) EBCDIC model
199 identifier of the configuration.
200 The identifier is left-justified
201 with trailing blank characters
202 if necessary. Valid only when
203 first word is not zero.
204 Otherwise, the cpcmodelcapident
205 field represents both the
206 model-capacity identifier
207 and the model. @H2A*/
208 unsigned char _filler3[3980]; /* Reserved @H1A*/
209} si11v1;
210
211 #define si11v1cpcmodel si11v1cpcmodelcapident
212
213/*********************************************************************/
214/* si22v1 represents the output for a V1 CPC when information */
215/* is requested about the set of CPUs */
216/*********************************************************************/
217
218typedef struct {
219 unsigned int si22v1format : 8; /* A 1-byte value. When the
220 value is 1, the ACCOffset field
221 is valid @L1A*/
222 unsigned int : 8; /* Reserved @L1A*/
223 unsigned int si22v1accoffset : 16; /* Alternate CPU Capability
224 Offset. A 16-bit unsigned binary
225 integer that specifies the
226 offset in bytes of the
227 alternate CPU capability
228 area (which is physically
229 within the SI22V1area, and is
230 mapped by si22v1alt)
231 @L1A*/
232 unsigned char _filler1[24]; /* Reserved @H3C*/
233 unsigned char si22v1secondarycpucapability[4]; /*
234 An unsigned binary integer that,
235 when not zero, specifies a
236 secondary capability that may be
237 applied to certain types of CPUs
238 in the configuration. There is
239 no formal description of the
240 algorithm used to generate this
241 integer, except that it is the
242 same algorithm used to generate
243 the CPU capability. The integer
244 is used as an indication of the
245 capability of a CPU relative to
246 the capability of other CPU
247 models, and also relative to the
248 capability of other CPU types
249 within a model. When the value
250 is zero, all CPUs of any CPU
251 type in the configuration have
252 the same capability, as
253 specified by the CPU capability.
254 @H3A*/
255 unsigned char si22v1cpucapability[4]; /*
256 An unsigned binary integer
257 that specifies the capability
258 of one of the CPUs contained
259 in the V1 CPC. It is used as
260 an indication of the
261 capability of the CPU relative
262 to the capability of other CPU
263 models. @H1A*/
264 unsigned int si22v1totalcpucount : 16; /* A 2-byte
265 unsigned integer
266 that specifies the
267 total number of CPUs contained
268 in the V1 CPC. This number
269 includes all CPUs in the
270 configured state, the standby
271 state, and the reserved state.
272 @H1A*/
273 unsigned int si22v1configuredcpucount : 16; /* A 2-byte
274 unsigned binary
275 integer that specifies
276 the total number of CPUs that
277 are in the configured state. A
278 CPU is in the configured state
279 when it is described in the
280 V1-CPC configuration
281 definition and is available to
282 be used to execute programs.
283 @H1A*/
284 unsigned int si22v1standbycpucount : 16; /* A 2-byte
285 unsigned integer
286 that specifies the
287 total number of CPUs that are
288 in the standby state. A CPU is
289 in the standby state when it
290 is described in the V1-CPC
291 configuration definition, is
292 not available to be used to
293 execute programs, but can be
294 used to execute programs by
295 issuing instructions to place
296 it in the configured state.
297 @H1A*/
298 unsigned int si22v1reservedcpucount : 16; /* A 2-byte
299 unsigned binary
300 integer that specifies
301 the total number of CPUs that
302 are in the reserved state. A
303 CPU is in the reserved state
304 when it is described in the
305 V1-CPC configuration
306 definition, is not available
307 to be used to execute
308 programs, and cannot be made
309 available to be used to
310 execute programs by issuing
311 instructions to place it in
312 the configured state, but it
313 may be possible to place it in
314 the standby or configured
315 state through manually
316 initiated actions @H1A*/
317 struct {
318 unsigned char _si22v1mpcpucapaf[2]; /* Each individual
319 adjustment factor. @H1A*/
320 unsigned char _filler2[4050];
321 } si22v1mpcpucapafs; /* This field is valid only
322 when si22v1format is 0 @L1A*/
323} si22v1;
324
325#define si22v1mpcpucapaf si22v1mpcpucapafs._si22v1mpcpucapaf
326
327/*********************************************************************/
328/* si22v1alt maps the area located within the si22v1 area by the */
329/* si22v1accoffset field, when the si22v1format field has a value */
330/* of one. */
331/*********************************************************************/
332
333typedef struct {
334 unsigned int si22v1altcpucapability; /* A 32-bit unsigned binary
335 integer that specifies the announced
336 capability of one of the CPUs in the
337 configuration. There is no formal
338 description of the algorithm used to
339 generate this integer. The integer is
340 used as an indication of the
341 announced capability of the CPU
342 relative to the announced capability
343 of other CPU models.
344 The alternate-capability value
345 applies to each of the CPUs in the
346 configuration. That is, all CPUs in
347 the configuraiton have the same
348 alternate capability.
349 @L1A*/
350 struct {
351 unsigned char _si22v1altmpcpucapaf[2]; /* Each individual
352 adjustment factor. Note that the
353 leading underscore in the name is
354 to allow use of a #define that
355 is below. @L1A*/
356 unsigned char _filler2[4050];
357 } si22v1altmpcpucapafs; /*
358 A series of contiguous 2-byte fields,
359 each containing a 16-bit unsigned
360 binary integer which is an adjustment
361 factor (percentage) for the value
362 contained in the altternate-CPU-
363 capability field. The number of
364 alternate-adjustment-factor
365 fields is one less than the number
366 of CPUs specified in the
367 total-CPU-count field. The alternate-
368 adjustment-factor fields correspond
369 to configurations
370 with increasing numbers of CPUs in
371 the configured state. The first
372 alternate-adjustment-factor
373 field corresponds to a configuration
374 with two CPUs in the configured
375 state. Each successive alternate-
376 adjustment-factor field corresponds
377 to a configuration with a number of
378 CPUs in the configurd state that is
379 more than that for the preceding
380 field. @L1A*/
381} si22v1alt; /* @L1A*/
382
383#define si22v1altmpcpucapaf si22v1altmpcpucapafs._si22v1altmpcpucapaf
384
385/*********************************************************************/
386/* si22v2 represents the output for a V2 CPC when information */
387/* is requested about the set of CPUs */
388/*********************************************************************/
389
390typedef struct {
391 unsigned char _filler1[32]; /* Reserved @H1A*/
392 unsigned int si22v2cpcnumber : 16; /* A 2-byte
393 unsigned integer
394 which is the number of
395 this V2 CPC. This number
396 distinguishes this V2 CPC from
397 all other V2 CPCs provided by
398 the same logical-partition
399 hypervisor @H1A*/
400 unsigned char _filler2; /* Reserved @H1A*/
401 struct {
402 unsigned int _si22v2lcpudedicated : 1; /*
403 When one, indicates that
404 one or more of the logical
405 CPUs for this V2 CPC are
406 provided using V1 CPUs that
407 are dedicated to this V2 CPC
408 and are not used to provide
409 logical CPUs for any other V2
410 CPCs. The number of logical
411 CPUs that are provided using
412 dedicated V1 CPUs is specified
413 by the dedicated-LCPU-count
414 value. When zero, bit 0
415 indicates that none of the
416 logical CPUs for this V2 CPC
417 are provided using V1 CPUs
418 that are dedicated to this V2
419 CPC. @H1A*/
420 unsigned int _si22v2lcpushared : 1; /*
421 When one, indicates that
422 or more of the logical CPUs
423 for this V2 CPC are provided
424 using V1 CPUs that can be used
425 to provide logical CPUs for
426 other V2 CPCs. The number of
427 logical CPUs that are provided
428 using shared V1 CPUs is
429 specified by the
430 shared-LCPU-count value. When
431 zero, it indicates that none
432 of the logical CPUs for this
433 V2 CPC are provided using
434 shared V1 CPUs. @H1A*/
435 unsigned int _si22v2lcpuulimit : 1; /*
436 Utilization limit. When one,
437 indicates that the amount of
438 use of the V1-CPC CPUs that
439 are used to provide the
440 logical CPUs for this V2 CPC
441 is limited. When zero, it
442 indicates that the amount of
443 use of the V1-CPC CPUs that
444 are used to provide the
445 logical CPUs for this V2 CPC
446 is unlimited. @H1A*/
447 unsigned int _filler3 : 5; /* Reserved
448 @H1A*/
449 } si22v2lcpuc; /* Characteristics @H1A*/
450 unsigned int si22v2totallcpucount : 16; /*
451 A 2-byte unsigned
452 integer that specifies the
453 total number of logical CPUs
454 that are provided for this V2
455 CPC. This number includes all
456 of the logical CPUs that are
457 in the configured state, the
458 standby state, and the
459 reserved state. @H1A*/
460 unsigned int si22v2configuredlcpucount : 16; /*
461 A 2-byte unsigned
462 binary integer that specifies
463 the total number of logical
464 CPUs for this V2 CPC that are
465 in the configured state. A
466 logical CPU is in the
467 configured state when it is
468 described in the V2-CPC
469 configuration definition and
470 is available to be used to
471 execute programs. @H1A*/
472 unsigned int si22v2standbylcpucount : 16; /*
473 A 2-byte unsigned
474 binary integer that specifies
475 the total number of logical
476 CPUs that are in the standby
477 state. A logical CPU is in the
478 standby state when it is
479 described in the V2-CPC
480 configuration definition, is
481 not available to be used to
482 execute programs, but can be
483 used to execute programs by
484 issuing instructions to place
485 it in the configured state.
486 @H1A*/
487 unsigned int si22v2reservedlcpucount : 16; /*
488 A 2-byte unsigned
489 binary integer that specifies
490 the total number of logical
491 CPUs that are in the reserved
492 state. A logical CPU is in the
493 reserved state when it is
494 described in the V2-CPC
495 configuration definition, is
496 not available to be used to
497 execute programs, and cannot
498 be made available to be used
499 to execute programs by issuing
500 instructions to place it in
501 the configured state, but it
502 may be possible to place it in
503 the standby or configured
504 state through manually
505 initiated actions @H1A*/
506 unsigned char si22v2cpcname[8]; /*
507 The 8-character EBCDIC name of
508 this V2 CPC. The name is
509 left-justified with trailing
510 blank characters if necessary.
511 @H1A*/
512 unsigned char si22v2cpccapabilityaf[4]; /* Capability Adjustment
513 Factor (CAF). An unsigned
514 binary integer of 1000 or
515 less. The adjustment factor
516 specifies the amount of the
517 V1-CPC capability that is
518 allowed to be used for this V2
519 CPC by the logical-partition
520 hypervisor. The fraction of
521 V1-CPC capability is
522 determined by dividing the CAF
523 value by 1000. @H1A*/
524 unsigned char si22v2lparorigin[8]; /* A 64-bit unsigned binary
525 integer, called a logical
526 partition origin, which
527 represents the relocation-zone
528 origin of the logical
529 partition. @L3C*/
530 unsigned char _filler4[8]; /* Reserved @L3C*/
531 unsigned int si22v2dedicatedlcpucount : 16; /*
532 A 2-byte unsigned
533 binary integer that specifies
534 the number of configured-state
535 logical CPUs for this V2 CPC
536 that are provided using
537 dedicated V1 CPUs. (See the
538 description of bit
539 si22v2lcpudedicated.) @H1A*/
540 unsigned int si22v2sharedlcpucount : 16; /*
541 A 2-byte unsigned
542 integer that specifies the
543 number of configured-state
544 logical CPUs for this V2 CPC
545 that are provided using shared
546 V1 CPUs. (See the description
547 of bit si22v2lcpushared.)
548 @H1A*/
549 unsigned char _filler5[4020]; /* Reserved @H1A*/
550} si22v2;
551
552#define si22v2lcpudedicated si22v2lcpuc._si22v2lcpudedicated
553#define si22v2lcpushared si22v2lcpuc._si22v2lcpushared
554#define si22v2lcpuulimit si22v2lcpuc._si22v2lcpuulimit
555
556/*********************************************************************/
557/* si22v3db is a description block that comprises part of the */
558/* si22v3 data. */
559/*********************************************************************/
560
561typedef struct {
562 unsigned char _filler1[4]; /* Reserved @H1A*/
563 unsigned int si22v3dbtotallcpucount : 16; /*
564 A 2-byte unsigned
565 binary integer that specifies
566 the total number of logical
567 CPUs that are provided for
568 this V3 CPC. This number
569 includes all of the logical
570 CPUs that are in the
571 configured state, the standby
572 state, and the reserved state.
573 @H1A*/
574 unsigned int si22v3dbconfiguredlcpucount : 16; /*
575 A 2-byte unsigned
576 binary integer that specifies
577 the number of logical CPUs for
578 this V3 CPC that are in the
579 configured state. A logical
580 CPU is in the configured state
581 when it is described in the
582 V3-CPC configuration
583 definition and is available to
584 be used to execute programs.
585 @H1A*/
586 unsigned int si22v3dbstandbylcpucount : 16; /*
587 A 2-byte unsigned
588 binary integer that specifies
589 the number of logical CPUs for
590 this V3 CPC that are in the
591 standby state. A logical CPU
592 is in the standby state when
593 it is described in the V3-CPC
594 configuration definition, is
595 not available to be used to
596 execute programs, but can be
597 used to execute programs by
598 issuing instructions to place
599 it in the configured state.
600 @H1A*/
601 unsigned int si22v3dbreservedlcpucount : 16; /*
602 A 2-byte unsigned
603 binary integer that specifies
604 the number of logical CPUs for
605 this V3 CPC that are in the
606 reserved state. A logical CPU
607 is in the reserved state when
608 it is described in the V2-CPC
609 configuration definition, is
610 not available to be used to
611 execute programs, and cannot
612 be made available to be used
613 to execute programs by issuing
614 instructions to place it in
615 the configured state, but it
616 may be possible to place it in
617 the standby or configured
618 state through manually
619 initiated actions @H1A*/
620 unsigned char si22v3dbcpcname[8]; /* The 8-character EBCDIC name
621 of this V3 CPC. The name is
622 left-justified with trailing
623 blank characters if necessary.
624 @H1A*/
625 unsigned char si22v3dbcpccaf[4]; /* A 4-byte unsigned binary
626 integer that specifies an
627 adjustment factor. The
628 adjustment factor specifies
629 the amount of the V1-CPC or
630 V2-CPC capability that is
631 allowed to be used for this V3
632 CPC by the
633 virtual-machine-hypervisor
634 program. @H1A*/
635 unsigned char si22v3dbvmhpidentifier[16]; /* The 16-character
636 EBCDIC identifier of the
637 virtual-machine-hypervisor
638 program that provides this V3
639 CPC. (This identifier may
640 include qualifiers such as
641 version number and release
642 level). The identifier is
643 left-justified with trailing
644 blank characters if necessary.
645 @H1A*/
646 unsigned char _filler2[24]; /* Reserved @H1A*/
647} si22v3db;
648/*********************************************************************/
649/* si22v3 represents the output for a V3 CPC when information */
650/* is requested about the set of CPUs */
651/*********************************************************************/
652
653typedef struct {
654 unsigned char _filler1[28]; /* Reserved @H1A*/
655 unsigned char _filler2[3]; /* Reserved @H1A*/
656 struct {
657 unsigned int _filler3 : 4; /* Reserved
658 @H1A*/
659 unsigned int _si22v3dbcount : 4; /*
660 Description Block Count. A
661 4-bit unsigned binary integer
662 that indicates the number (up
663 to 8) of V3-CPC description
664 blocks that are stored in the
665 si22v3dbe array. @H1A*/
666 } si22v3dbcountfield; /* @H1A*/
667 si22v3db si22v3dbe[8]; /* Array of entries. Only the number
668 indicated by si22v3dbcount
669 are valid @H1A*/
670 unsigned char _filler5[3552]; /* Reserved @H1A*/
671} si22v3;
672
673#define si22v3dbcount si22v3dbcountfield._si22v3dbcount
674
675
676/*********************************************************************/
677/* SI00 represents the "starter" information. This structure is */
678/* part of the information returned on every CSRSI request. */
679/*********************************************************************/
680
681typedef struct {
682 char si00cpcvariety; /* SI00CPCVariety_V1CPC_MACHINE,
683 SI00CPCVariety_V2CPC_LPAR, or
684 SI00CPCVariety_V3CPC_VM @H1A*/
685 struct {
686 unsigned int _si00validsi11v1 : 1; /* si11v1 was requested and
687 the information returned is valid
688 @H1A*/
689 unsigned int _si00validsi22v1 : 1; /* si22v2 was requested and
690 the information returned is valid
691 @H1A*/
692 unsigned int _si00validsi22v2 : 1; /* si22v2 was requested and
693 the information returned is valid
694 @H1A*/
695 unsigned int _si00validsi22v3 : 1; /* si22v3 was requested and
696 the information returned is valid
697 @H1A*/
698 unsigned int _filler1 : 4; /* Reserved @H1A*/
699 } si00validityflags;
700 unsigned char _filler2[2]; /* Reserved @H1A*/
701 unsigned char si00pccacpid[12]; /* PCCACPID value for this CPU
702 @H1A*/
703 unsigned char si00pccacpua[2]; /* PCCACPUA value for this CPU
704 @H1A*/
705 unsigned char si00pccacafm[2]; /* PCCACAFM value for this CPU.
706 This has information only
707 about CPUs 0-15 @L2C*/
708 unsigned char _filler3[4]; /* Reserved @H1A*/
709 unsigned char si00lastupdatetimestamp[8]; /* Time of last STSI
710 update, via STCK @H1A*/
711 unsigned char si00pcca_cpu_address_mask[8]; /*
712 PCCA_CPU_Address_Mask value for this CPU
713 @L2A*/
714 unsigned char _filler4[24]; /* Reserved @L2C*/
715} si00;
716
717#define si00validsi11v1 si00validityflags._si00validsi11v1
718#define si00validsi22v1 si00validityflags._si00validsi22v1
719#define si00validsi22v2 si00validityflags._si00validsi22v2
720#define si00validsi22v3 si00validityflags._si00validsi22v3
721
722/*********************************************************************/
723/* siv1 represents the information returned when V1CPC_MACHINE */
724/* data is requested */
725/*********************************************************************/
726
727typedef struct {
728 si00 siv1si00; /* Area mapped by
729 struct si00 @H1A*/
730 si11v1 siv1si11v1; /* Area
731 mapped by struct si11v1 @H1A*/
732 si22v1 siv1si22v1; /* Area
733 mapped by struct si22v1 @H1A*/
734} siv1;
735
736/*********************************************************************/
737/* siv1v2 represents the information returned when V1CPC_MACHINE */
738/* data and V2CPC_LPAR data is requested */
739/*********************************************************************/
740
741typedef struct {
742 si00 siv1v2si00; /* Area mapped by
743 by struct si00 @H1A*/
744 si11v1 siv1v2si11v1; /* Area
745 mapped by struct si11v1 @H1A*/
746 si22v1 siv1v2si22v1; /* Area
747 mapped by struct si22v2 @H1A*/
748 si22v2 siv1v2si22v2; /* Area
749 mapped by struct si22v2 @H1A*/
750} siv1v2;
751
752/*********************************************************************/
753/* siv1v2v3 represents the information returned when V1CPC_MACHINE */
754/* data, V2CPC_LPAR data and V3CPC_VM data is requested */
755/*********************************************************************/
756
757typedef struct {
758 si00 siv1v2v3si00; /* Area
759 mapped by struct si00 @H1A*/
760 si11v1 siv1v2v3si11v1; /* Area
761 mapped by struct si11v1 @H1A*/
762 si22v1 siv1v2v3si22v1; /* Area
763 mapped by struct si22v1 @H1A*/
764 si22v2 siv1v2v3si22v2; /* Area
765 mapped by struct si22v2 @H1A*/
766 si22v3 siv1v2v3si22v3; /* Area
767 mapped by struct si22v3 @H1A*/
768} siv1v2v3;
769
770/*********************************************************************/
771/* siv1v3 represents the information returned when V1CPC_MACHINE */
772/* data and V3CPC_VM data is requested */
773/*********************************************************************/
774
775typedef struct {
776 si00 siv1v3si00; /* Area mapped
777 by struct si00 @H1A*/
778 si11v1 siv1v3si11v1; /* Area
779 mapped by struct si11v1 @H1A*/
780 si22v1 siv1v3si22v1; /* Area
781 mapped by struct si22v1 @H1A*/
782 si22v3 siv1v3si22v3; /* Area
783 mapped by struct si22v3 @H1A*/
784} siv1v3;
785
786/*********************************************************************/
787/* siv2 represents the information returned when V2CPC_LPAR */
788/* data is requested */
789/*********************************************************************/
790
791typedef struct {
792 si00 siv2si00; /* Area mapped by
793 struct si00 @H1A*/
794 si22v2 siv2si22v2; /* Area
795 mapped by struct si22v2 @H1A*/
796} siv2;
797
798/*********************************************************************/
799/* siv2v3 represents the information returned when V2CPC_LPAR */
800/* and V3CPC_VM data is requested */
801/*********************************************************************/
802
803typedef struct {
804 si00 siv2v3si00; /* Area mapped
805 by struct si00 @H1A*/
806 si22v2 siv2v3si22v2; /* Area
807 mapped by struct si22v2 @H1A*/
808 si22v3 siv2v3si22v3; /* Area
809 mapped by struct si22v3 @H1A*/
810} siv2v3;
811
812/*********************************************************************/
813/* siv3 represents the information returned when V3CPC_VM */
814/* data is requested */
815/*********************************************************************/
816
817typedef struct {
818 si00 siv3si00; /* Area mapped by
819 struct si00 @H1A*/
820 si22v3 siv3si22v3; /* Area
821 mapped by struct si22v3 @H1A*/
822} siv3;
823
824
825/*********************************************************************
826 * Fixed Service Parameter and Return Code Defines *
827 *********************************************************************/
828
829/* SI00 Constants */
830
831#define SI00CPCVARIETY_V1CPC_MACHINE 1
832#define SI00CPCVARIETY_V2CPC_LPAR 2
833#define SI00CPCVARIETY_V3CPC_VM 3
834
835/* CSRSI Constants */
836
837#define CSRSI_REQUEST_V1CPC_MACHINE 1
838#define CSRSI_REQUEST_V2CPC_LPAR 2
839#define CSRSI_REQUEST_V3CPC_VM 4
840
841/* CSRSI Return codes */
842
843#define CSRSI_SUCCESS 0
844#define CSRSI_STSINOTAVAILABLE 4
845#define CSRSI_SERVICENOTAVAILABLE 8
846#define CSRSI_BADREQUEST 12
847#define CSRSI_BADINFOAREALEN 16
848#define CSRSI_BADLOCK 20
849
850#endif // ifndef(__CSRSI)
si00
Definition csrsic.h:681
si00::_si00validsi22v1
unsigned int _si00validsi22v1
Definition csrsic.h:689
si00::_si00validsi11v1
unsigned int _si00validsi11v1
Definition csrsic.h:686
si00::_filler1
unsigned int _filler1
Definition csrsic.h:698
si00::_si00validsi22v3
unsigned int _si00validsi22v3
Definition csrsic.h:695
si00::_si00validsi22v2
unsigned int _si00validsi22v2
Definition csrsic.h:692
si00::si00cpcvariety
char si00cpcvariety
Definition csrsic.h:682
si11v1
Definition csrsic.h:156
si22v1
Definition csrsic.h:218
si22v1::si22v1standbycpucount
unsigned int si22v1standbycpucount
Definition csrsic.h:284
si22v1::si22v1totalcpucount
unsigned int si22v1totalcpucount
Definition csrsic.h:264
si22v1::si22v1accoffset
unsigned int si22v1accoffset
Definition csrsic.h:223
si22v1::si22v1reservedcpucount
unsigned int si22v1reservedcpucount
Definition csrsic.h:298
si22v1::si22v1configuredcpucount
unsigned int si22v1configuredcpucount
Definition csrsic.h:273
si22v1::int
unsigned int
Definition csrsic.h:222
si22v1::si22v1format
unsigned int si22v1format
Definition csrsic.h:219
si22v1alt
Definition csrsic.h:333
si22v1alt::si22v1altcpucapability
unsigned int si22v1altcpucapability
Definition csrsic.h:334
si22v2
Definition csrsic.h:390
si22v2::si22v2standbylcpucount
unsigned int si22v2standbylcpucount
Definition csrsic.h:472
si22v2::_si22v2lcpushared
unsigned int _si22v2lcpushared
Definition csrsic.h:420
si22v2::si22v2sharedlcpucount
unsigned int si22v2sharedlcpucount
Definition csrsic.h:540
si22v2::si22v2dedicatedlcpucount
unsigned int si22v2dedicatedlcpucount
Definition csrsic.h:531
si22v2::_filler3
unsigned int _filler3
Definition csrsic.h:447
si22v2::_filler2
unsigned char _filler2
Definition csrsic.h:400
si22v2::si22v2configuredlcpucount
unsigned int si22v2configuredlcpucount
Definition csrsic.h:460
si22v2::si22v2reservedlcpucount
unsigned int si22v2reservedlcpucount
Definition csrsic.h:487
si22v2::_si22v2lcpuulimit
unsigned int _si22v2lcpuulimit
Definition csrsic.h:435
si22v2::_si22v2lcpudedicated
unsigned int _si22v2lcpudedicated
Definition csrsic.h:402
si22v2::si22v2totallcpucount
unsigned int si22v2totallcpucount
Definition csrsic.h:450
si22v2::si22v2cpcnumber
unsigned int si22v2cpcnumber
Definition csrsic.h:392
si22v3
Definition csrsic.h:653
si22v3::_si22v3dbcount
unsigned int _si22v3dbcount
Definition csrsic.h:659
si22v3::_filler3
unsigned int _filler3
Definition csrsic.h:657
si22v3db
Definition csrsic.h:561
si22v3db::si22v3dbreservedlcpucount
unsigned int si22v3dbreservedlcpucount
Definition csrsic.h:601
si22v3db::si22v3dbconfiguredlcpucount
unsigned int si22v3dbconfiguredlcpucount
Definition csrsic.h:574
si22v3db::si22v3dbstandbylcpucount
unsigned int si22v3dbstandbylcpucount
Definition csrsic.h:586
si22v3db::si22v3dbtotallcpucount
unsigned int si22v3dbtotallcpucount
Definition csrsic.h:563
siv1
Definition csrsic.h:727
siv1::siv1si22v1
si22v1 siv1si22v1
Definition csrsic.h:732
siv1::siv1si00
si00 siv1si00
Definition csrsic.h:728
siv1::siv1si11v1
si11v1 siv1si11v1
Definition csrsic.h:730
siv1v2
Definition csrsic.h:741
siv1v2::siv1v2si00
si00 siv1v2si00
Definition csrsic.h:742
siv1v2::siv1v2si22v1
si22v1 siv1v2si22v1
Definition csrsic.h:746
siv1v2::siv1v2si11v1
si11v1 siv1v2si11v1
Definition csrsic.h:744
siv1v2::siv1v2si22v2
si22v2 siv1v2si22v2
Definition csrsic.h:748
siv1v2v3
Definition csrsic.h:757
siv1v2v3::siv1v2v3si22v1
si22v1 siv1v2v3si22v1
Definition csrsic.h:762
siv1v2v3::siv1v2v3si22v3
si22v3 siv1v2v3si22v3
Definition csrsic.h:766
siv1v2v3::siv1v2v3si00
si00 siv1v2v3si00
Definition csrsic.h:758
siv1v2v3::siv1v2v3si11v1
si11v1 siv1v2v3si11v1
Definition csrsic.h:760
siv1v2v3::siv1v2v3si22v2
si22v2 siv1v2v3si22v2
Definition csrsic.h:764
siv1v3
Definition csrsic.h:775
siv1v3::siv1v3si00
si00 siv1v3si00
Definition csrsic.h:776
siv1v3::siv1v3si11v1
si11v1 siv1v3si11v1
Definition csrsic.h:778
siv1v3::siv1v3si22v1
si22v1 siv1v3si22v1
Definition csrsic.h:780
siv1v3::siv1v3si22v3
si22v3 siv1v3si22v3
Definition csrsic.h:782
siv2
Definition csrsic.h:791
siv2::siv2si22v2
si22v2 siv2si22v2
Definition csrsic.h:794
siv2::siv2si00
si00 siv2si00
Definition csrsic.h:792
siv2v3
Definition csrsic.h:803
siv2v3::siv2v3si22v3
si22v3 siv2v3si22v3
Definition csrsic.h:808
siv2v3::siv2v3si22v2
si22v2 siv2v3si22v2
Definition csrsic.h:806
siv2v3::siv2v3si00
si00 siv2v3si00
Definition csrsic.h:804
siv3
Definition csrsic.h:817
siv3::siv3si00
si00 siv3si00
Definition csrsic.h:818
siv3::siv3si22v3
si22v3 siv3si22v3
Definition csrsic.h:820
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